IC packaging is the essential technology that distributes electrical signals from a silicon chip onto the printed circuit board and provides protection against environmental stresses. To comply with market applications, the requirements of electronic products, including low profile, small foot-print, light weight, high power dissipation, and better performance in terms of voltage and reliability, have been translated into our IC packaging technology.
ChipMOS offers a broad range of package families designed to provide our customers with an array of packaging solutions. The packages available include TSOP (Thin Small Outline Package), TCP (Tape Carrier Package), COG (Chip On Glass) and COF (Chip On Film). For better device performance during applications, ChipMOS employs state-of-the-art CAE (Computer Aided Engineering) simulation techniques, for both electrical and thermal analyses, to facilitate package design and manufacturing parameter optimization. Customers are able to make good use of ChipMOS' technical capability by inputting their information on the "Design Center" or "Package Characterization" pages of our website.
To be competitive and provide a leading edge to our customers, ChipMOS, together with our material and equipment vendors and customers, have focused significant resources on the development of advanced packaging technologies, including: 3D technology, flip chip technology, green technology, and system-in-package technology.
Mechanical samples are available from our shop floor for trial run and equipment parameter setting.